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general description the max11300 integrates a pixi?, 12-bit, multichannel, analog-to-digital converter (adc) and a 12-bit, multichan - nel, buffered digital-to-analog converter (dac) in a single integrated circuit. this device offers 20 mixed-signal high- voltage, bipolar ports, which are configurable as an adc analog input, a dac analog output, a general-purpose input (gpi), a general-purpose output (gpo), or an analog switch terminal. one internal and two external temperature sensors track junction and environmental temperature. adjacent pairs of ports are configurable as a logic-level translator for open-drain devices or an analog switch. pixi ports provide highly flexible hardware configuration for 12-bit mixed-signal applications. the max11300 is best suited for applications that demand a mixture of analog and digital functions. each port is individually configurable with up to four selectable voltage ranges within -10v to +10v. the max11300 allows for the averaging of 2, 4, 8, 16, 32, 64, or 128 adc samples from each adc-configured port to improve noise performance. a dac-configured output port can drive up to 25ma. the gpio ports can be pro - grammed to user-defined logic levels, and a gpi coupled with a gpo forms a logic-level translator. internal and external temperature measurements monitor programmable conditions of minimum and maximum tem - perature limits, using the interrupt to notify the host if one or more conditions occur. the temperature measurement results are made available through the serial interface. the max11300 features an internal, low-noise 2.5v volt - age reference and provides the option to use external voltage references with separate inputs for the dac and adc. the device uses a 4-wire, 20mhz, spi-compatible serial interface, operating from a 5v analog supply and a 1.8v to 5.0v digital supply. the pixi port supply voltages operate from a wide range of -12.5v to +12.5v. the max11300 is available in a 40-pin tqfn, 6mm x 6mm package or a 48-pin tqfp, 9mm x 9mm package specified over the -40c to +105c temperature range. applications base station rf power device bias controllers system supervision and control power-supply monitoring industrial control and automation control for optical components features up to 20 12-bit adc inputs, single-ended or differential adc absolute input voltage ranges ? 0v to +10v ? -5v to +5v ? -10v to 0v ? 0v to +2.5v (direct adc connection) programmable sampling averaging per adc port up to 20 12-bit dac outputs with 25ma current capability dac output voltage ranges ? 0v to +10v ? -5v to +5v ? -10v to 0v up to 20 general-purpose digital i/o 0v to +5v input range for gpi 0v to +2.5v programmable threshold range for gpi 0v to +10v programmable output range for gpo internal or exte rnal voltage reference for dac and adc individually selectable voltage reference for each adc-configured pixi port internal and external temperature sensors, 1c accuracy 60? analog switch between adjacent pixi ports +5v analog supply 1.8v to 5.0v compatible serial interface 20mhz spi/qspi -compatible small 6mm x 6mm 40-pin tqfn and 9mm x 9mm 48-pin tqfp packages ordering information appears at end of data sheet. pixi is a trademark of maxim integrated products, inc. for related parts and recommended products to use with this part, refer to www.maximintegrated.com/max11300.related . 19-7318; rev 0; 3/14 evaluation kit available max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio
dac sequencer int cnvt d0n internal reference adc 2.5v 2.5v serial interface and digital core adc sequencer 20 20 20 20 20 dac gpi gpo dout cs sclk din ext and int temp sensors temperature monitors d0p d1n d1p dgnd agnd avssio dvdd dac_ref adc_int_ref adc_ext_ref avdd avddio max11300 reference mux (0 x 18) port[x+1] port[x] agnd1 pixi port manager clock generator maxim integrated g 2 functional diagram max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
dvdd to dgnd ....................................................... -0.3v to +6v avdd to agnd ....................................................... -0.3v to +6v avddio to avssio ............................................... -0.3v to +25v avddio to agnd .................................................. -0.3v to +17v avssio to agnd .................................................. -14v to +0.3v agnd to agnd1 .................................................. -0.3v to +0.3v agnd to dgnd ................................................... -0.3v to +0.3v agnd1 to dgnd ................................................. -0.3v to +0.3v (port0 to port19) to agnd ............. max of (v avssio - 0.3v) or -14v to min of (v avddio + 0.3v) or +17v (port0 to port19) to agnd (gpi and bidirectional level translator modes) ..... -0.3v to the min of (v avdd + 0.3v) or +6v ( cnvt, dout) to dgnd ... -0.3v to the min of (v dvdd + 0.3v) or +6v (cs , sclk, din, int) to dgnd .............................. -0.3v to +6v dac and adc reference pins to agnd (dac_ref, adc_int_ref, adc_ext_ref) .............. -0.3v to the min of ( v avdd + 0.3v) or +4v temperature sensor pins (d0n, d0p, d1n, d1p) to agnd ..................... -0.3v to the min of (v avdd + 0.3v) or +6v current into any port pin .............................................. 100ma current into any other pin except supplies and ground .................................................................... 50ma continuous power dissipation (t a = +70c) (multilayer board) tqfn (derate 37mw/c above +70c) ................... 2963mw tqfp (derate 36.2mw/c above +70c) ............... 2898.6mw operating temperature range ......................... -40c to +105c storage temperature range ............................ -65c to +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ....................................... +260c tqfn junction-to-case thermal resistance ( jc ) ................. 1c/w junction-to-ambient thermal resistance ( ja ) ........... 27c/w tqfp junction-to-case thermal resistance ( jc ) ................. 2c/w junction-to-ambient thermal resistance ( ja ) ........ 27.6c/w adc electrical specifcations (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) parameter symbol conditions min typ max units dc accuracy (note 3) resolution 12 bits integral nonlinearity inl 2.5 lsb differential nonlinearity dnl no missing codes over temperature 1 lsb offset error 0v input, differential mode 0.5 5 lsb offset error drift 0.002 lsb/oc gain error 1.0 12 lsb gain error drift 0.01 lsb/oc channel-to-channel offset matching 1 lsb channel-to-channel gain matching 2 lsb maxim integrated g 3 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. (note 1) package thermal characteristics electrical characteristics max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
adc electrical specifcations (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) parameter symbol conditions min typ max units dynamic performance (single-ended inputs) signal-to-noise plus distortion sinad f s = 400ksps, f in = 10khz 70 db signal to noise snr f s = 400ksps, f in = 10khz 71 db total harmonic distortion thd f s = 400ksps, f in = 10khz -75 db spurious-free dynamic range sfdr f s = 400ksps, f in = 10khz 75 db crosstalk f s = 100ksps, f in = 10khz -85 db dynamic performance (differential inputs) signal-to-noise plus distortion sinad f s = 400ksps, f in = 10khz 71 db signal to noise snr f s = 400ksps, f in = 10khz 72 db total harmonic distortion thd f s = 400ksps, f in = 10khz -82 db spurious-free dynamic range sfdr f s = 400ksps, f in = 10khz 82 db crosstalk f s = 100ksps, f in = 10khz -85 db conversion rate throughput (note 4) adcconv[1:0] = 00 200 ksps adcconv[1:0] = 01 250 adcconv[1:0] = 10 333 adcconv[1:0] = 11 400 acquisition time t acq adcconv[1:0] = 00 3.5 v adcconv[1:0] = 01 2.5 adcconv[1:0] = 10 1.5 adcconv[1:0] = 11 1.0 analog input (all ports) input voltage range (note 5) v port range 1 0 10 v range 2 -5 +5 range 3 -10 0 range 4 0 2.5 input resistance range 1, 2, 3 70 100 130 n range 4 50 75 95 n maxim integrated g 4 electrical characteristics (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) (v avdd = 5.0v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) parameter symbol conditions min typ max units adc internal reference reference output voltage internal references at t a = +25 c 2.494 2.5 2.506 v ref output tempco (note 6) t c-vref 10 25 ppm/ c capacitor bypass at adc_int_ ref 4.7 10 f dac internal reference reference output voltage internal references at t a = +25 c 2.494 2.5 2.506 v ref output tempco (note 6) t c-vref 10 25 ppm/ c capacitor bypass at dac_ref 4.7 10 f adc external reference reference input range 2 2.75 v dac external reference reference input range 1.25 2.5 v parameter symbol conditions min typ max units gpio except in bidirectional level translation mode programmable input logic threshold v ith 0.3 v dacref v input high voltage v ih v ith + 0.3 v input low voltage v il v ith - 0.3 v hysteresis 30 mv programmable output logic level v olvl 0 4 x v dacref v propagation delay from gpi input to gpo output in unidirectional level translating mode midscale threshold, 5v logic swing 3 s bidirectional level translation path and analog switch input high voltage v ih 1 v input low voltage v il 0.2 v on-resistance from v avssio +2.50v to v avddio - 2.50v 60 maxim integrated g 5 5()(ohfwulfdo6shflfdwlrqv *3,2(ohfwulfdo6shflfdwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) parameter symbol conditions min typ max units propagation delay 10k pullup resistors to rail in each side. midvoltage to midvoltage when driving side goes from high to low 1 s analog switch turn-on delay when controlled by gpi-confgured port 200 ns turn-off delay when controlled by gpi-confgured port 300 ns off time duration time before switch can be turned on again 10 s switch leakage current switch turned off, 5v across switch termi - nals 0.005 1 a on-resistance from v avssio +2.50v to v avddio - 2.50v 60 parameter symbol conditions min typ max units dc accuracy resolution n 12 bits output range (note 5) v port range 1 0 +10 v range 2 -5 +5 range 3 -10 0 integral linearity error inl from code 100 to code 3996 0.5 1.5 lsb differential linearity error dnl 0.5 1 lsb offset voltage at code 100 20 lsb offset voltage tempco 15 ppm/ q c gain error from code 100 to code 3996 -0.6 +0.6 % of fs gain error tempco from code 100 to code 3996 4 ppm of fs/ q c power-supply rejection ratio psrr 0.4 mv/v dynamic characteristics output voltage slew rate sr 1.6 v/s output settling time to 1 lsb, from 0 to full scale, output load capacitance of 250pf (note 7) 40 s settling time after current- limit condition 6 s noise f = 0.1hz to 300khz 3.8 mv p-p maxim integrated 6 *3,2(ohfwulfdo6shflfdwlrqvfrqwlqxhg (ohfwulfdo6shflfdwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) (v avdd = 5.0v, v dvdd = 1.62v to 5.50v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) parameter symbol conditions min typ max units track-and-hold digital feedthrough 5 nv s hold step 1 6 mv droop rate (note 6) 0.3 15 mv/s parameter symbol conditions min typ max units spi io dc specification input high voltage (din, sclk, cs , cnvt ) v dvdd = 2.50v to 5.50v 0.7 x v dvdd v v dvdd = 1.62v to 2.50v 0.7 x v dvdd v input low voltage (din, sclk, cs , cnvt ) v dvdd = 2.50v to 5.50v 0.3 x v dvdd v v dvdd = 1.62v to 2.50v 0.3 x v dvdd v input leakage current (din, sclk, cs , cnvt , int ) input voltage at dvdd -10 +10 a input capacitance (din, sclk, cs , cnvt ) 10 pf output high voltage (dout) i src = 5ma, v dvdd = 2.50v to 5.50v v dvdd - 0.5 v i src = 2ma, v dvdd = 1.62v to 2.50v v dvdd - 0.3 v output low voltage (dout, int ) i snk = 5ma, v dvdd = 2.50v to 5.50v 0.4 v i snk = 2ma, v dvdd = 1.62v to 2.50v 0.2 v output leakage current (dout) -10 +10 a maxim integrated 7 (ohfwulfdo6shflfdwlrqvfrqwlqxhg ,qwhuidfhljlwdo,2(ohfwulfdo6shflfdwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 5.0v, v dvdd = 1.62v to 5.50v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) figure 1. spi write timing (n = number of words written; n > 1 for burst mode) parameter symbol conditions min typ max units spi timing requirements ( see figures 1 and 2 ) sclk frequency f sclk v dvdd = 2.50v to 5.50v 20 mhz v dvdd = 1.62v to 2.50v 10 mhz sclk clock period t cp v dvdd = 2.50v to 5.50v 50 ns v dvdd = 1.62v to 2.50v 100 ns sclk pulse-width high t ch 10 ns sclk pulse-width low t cl v dvdd = 2.50v to 5.50v 25 ns v dvdd = 1.62v to 2.50v 65 ns cs low to first sclk rise setup t css0 5 ns 24th sclk rising edge to cs rising edge t css1 5 ns sclk rise to cs low t csh0 5 ns cs pulse-width high t csw 50 ns din to sclk setup t ds 5 ns din hold after sclk t dh 5 ns dout transition valid after sclk fall t dot v dvdd = 2.50v to 5.50v 23 ns v dvdd = 1.62v to 2.50v 55 ns cs rise to dout disable t dod c load = 20pf 50 ns cs din sclk dout ad 6 ad 5 d [ n 16 - 1 ] d [ n 16 - 2 ] d [ n 16 - 16 ] d [ n 16 - 15 ] d [ n 16 - 3 ] d [ n 16 - 12 ] rb / w ad 0 ad 1 ad 2 high - z t css 0 t csh 0 t ds t dh t ch t cl t cp t css 1 t csw maxim integrated 8 ,qwhuidfhljlwdo,2(ohfwulfdo6shflfdwlrqvfrqwlqxhg max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internal and external temperature sensor specifcations (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) figure 2. spi read timing (n = number of words written; n > 1 for burst mode) parameter symbol conditions min typ max units accuracy accuracy of internal sensor (note 6,8) 0 q 7 j q c 0.3 2.0 q c -40 q 7 j q c 0.7 5 q c accuracy of external sensor (note 6,8) 0 q 7 rj q c 0.3 2.0 q c -40 q 7 rj q c 1.0 5 q c temperature measurement resolution 0.125 q c external sensor junction current high 68 low 4 external sensor junction current high series resistance cancellation mode 136 low series resistance cancellation mode 8 d0n/d1n voltage (internally generated) 0.5 v cs din sclk dout ad6 ad5 rb/w ad0 ad1 ad2 high -z t css0 t csh0 t ds t dh t ch t cl t cp d[n16-1] d[n16-2] d[n16-16] d[n16-15] d[n16-3] d[n16-12] high-z t dot t css1 t csw t dod maxim integrated g 9 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
parameter symbol conditions min typ max units v avdd 4.75 5.25 v v dvdd 1.62 5.50 v v avddio v avdd 15.75 v v avssio - 12.5 0 v v avddio to v avssio v avdd 25 v i avdd all ports in high-impedance mode 14 18 ma lpen = 1 11 ma all ports in adc-related modes 17 ma all ports in dac-related modes 18 ma i dvdd serial interface in idle mode 2 a i avddio all ports in high-impedance mode 25 a i avssio all ports in high-impedance mode -200 a maxim integrated 10 3rhu6xsso6shflfdwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.5v, v agnd = v dgnd = 0v, v avssio = -2.5v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40 o c to +105 o c, unless otherwise noted. typical values are at t a = +25 o c.) (note 2) note 2: electrical specifications are production tested at t a = +25c. specifications over the entire operating temperature range are guaranteed by design and characterization. typical specifications are at t a = +25c. note 3: dc accuracy specifications are tested for single-ended adc inputs only. note 4: the effective adc sample rate for port x configured in mode 6, 7, or 8 is: [adc sample rate per adcconv]/(([number of ports in modes 6,7,8] + [1 if tmpsel 000]) x [2 # of samples for port x ]) note 5: see the recommended vddio/vssio supply selection table for each range. note 6 : specification is guaranteed by design and characterization. note 7: in dac-related modes, the rate, at which pixi ports confgured in mode 1, 3, 4, 5, 6, or 10 are refreshed, is as follows: 1/(40s x [number of ports in modes 1, 3, 4, 5, 6, 10]) note 8: typical (typ) values represent the errors at the extremes of the given temperature range. adc range -10v to 0v -5v to +5v 0v to +10v 0 to 2.5v dac range -10v to 0v v avddio = +5v v avssio = -12.5v v avddio = +7.5v v avssio = -12.5v v avddio = +12.5v v avssio = -12.5v v avddio = +5v v avssio = -12.5v -5v to +5v v avddio = +7.5v v avssio = -12.5v v avddio = +7.5v v avssio = -7.5v v avddio = +12.5v v avssio = -7.5v v avddio = +7.5v v avssio = -7.5v 0v to +10v v avddio = +12.5v v avssio = -12.5v v avddio = +12.5v v avssio = -7.5v v avddio = +12.5v v avssio = -2.5v v avddio = +12.5v v avssio = -2.5v parameter symbol conditions min typ max units pixi ports input capacitance all pixi ports 20 pf input bias current all pixi input pins except adc mode 100 a startup time between stable supplies and accessing registers 100 ms high-voltage output driver characteristics maximum output capacitance 250 pf output low voltage, dac mode sinking 25ma, v avssio = 0v, avddio = 10v v avssio + 1.0 v output high voltage, dac mode sourcing 25ma, v avssio = 0v, v avddio = 10v v avddio - 1.5 v output low voltage, gpo mode sinking 2ma, v avssio = 0v, v avddio = 10v v avssio + 0.4 v output high voltage, gpo mode sourcing 2ma, v avssio = 0v, v avddio = 10v v avddio C 0.4 v current limit short to avddio 75 ma short to avssio 75 ma maxim integrated 11 recommended vddio/vssio supply selection rpprq3,,(ohfwulfdo6shflfdwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 offset error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc offset error vs. temperature toc05 0 1 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 gain error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc gain error vs. temperature toc06 8 9 10 11 12 13 14 15 16 17 18 4.7 4.8 4.9 5 5.1 5.2 5.3 offset error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc offset error vs. supply voltage toc07 0 1 2 3 4 5 6 7 4.7 4.8 4.9 5 5.1 5.2 5.3 gain error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc gain error vs. supply voltage toc08 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc differential nonlinearity vs. digital output code internal reference toc02 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 0 1000 2000 3000 4000 inl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc integral nonlinearity vs. digital output code external reference toc03 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc differential nonlinearity vs. digital output code external reference toc04 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 0 1000 2000 3000 4000 inl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc integral nonlinearity vs. digital output code internal reference toc01 maxim integrated g 12 typical operating characteristics max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range - 5v to +5v i avdd toc9b i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range - 10v to 0v i avdd toc9c i avssio i avddio i avddio 14 14.5 15 15.5 16 16.5 17 17.5 18 0 5 10 15 20 i avdd current (ma) no.of adc - configured ports i avdd vs. adc channels adc range 0v to 10v toc10 adc range - 5v to +5v adc range - 10v to 0v 2.494 2.496 2.498 2.500 2.502 2.504 2.506 -50 -25 0 25 50 75 100 125 reference voltage (v) temperature ( c) adc internal reference vs. temperature toc11 -1.5 -1 -0.5 0 0.5 1 1.5 0 1000 2000 3000 4000 inl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac integral nonlinearity vs. digital code internal reference toc12 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac differential nonlinearity vs. digital output code internal reference toc13 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range 0v to 10v i avdd toc9a i avssio i avddio i avddio maxim integrated g 13 typical operating characteristics (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) -1.5 -1 -0.5 0 0.5 1 1.5 0 1000 2000 3000 4000 inl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac integral nonlinearity vs. digital code external reference toc14 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac differential nonlinearity vs. digital output code external reference toc15 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 -50 -25 0 25 50 75 100 125 offset error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v dac offset error vs. temperature toc16 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125 gain error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v dac gain error vs. temperature toc17 -2 -1 0 1 2 3 4 4.7 4.8 4.9 5 5.1 5.2 5.3 offset error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v dac offset error vs. supply voltage toc18 -1.5 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1 4.7 4.8 4.9 5 5.1 5.2 5.3 gain error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v dac gain error vs. supply voltage toc19 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range 0v to 10v i avdd toc20a i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range - 5v to +5v i avdd toc20b i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range - 10v to 0v i avdd toc20c i avssio i avddio i avddio maxim integrated g 14 typical operating characteristics (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) 13 14 15 16 17 18 19 0 5 10 15 20 i avdd current (ma) no. of dac - configured ports i avdd vs. dac channels adc range 0v to 10v toc21a adc range - 5v to +5v adc range - 10v to 0v 2.494 2.496 2.498 2.500 2.502 2.504 2.506 -50 -25 0 25 50 75 100 125 reference voltage (v) temperature ( c) dac internal reference vs. temperature toc22 2v/div toc23 5s/div dac settling time change from psv1 to psv2 psv1 = 0x000 psv2 = 0xfff 2v/div toc24a 2.5s/div dac settling time change from min to max no load 2v/div toc24b 2.5s/div dac settling time change from max to min no load 2v/div toc24c 50s/div dac settling time change from min to max 1f cap load 2v/div toc24d 50s/div dac settling time change from max to min 1f cap load maxim integrated 15 typical operating characteristics (continued) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 5 10 15 20 i avddio current (ma) no. of dac - configured ports i avddio vs. dac channels adc range 0v to 10v toc21b adc range - 5v to +5v adc range - 10v to 0v 0 1 2 3 4 5 6 7 0 5 10 15 20 i avssio current (ma) no. of dac - configured ports i avssio vs. dac channels adc range 0v to 10v toc21c adc range - 5v to +5v adc range - 10v to 0v max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range 0 to 10v) toc25a 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range - 5v to +5v) toc25b v avdd = 4.75v v avdd = 5v v avdd = 5.25v cs 5v/div toc29 10s/div major - code transition glitch dac code from 0x7ff to 0x800 dac v out ac - coupled 1mv/div 60.0 60.2 60.4 60.6 60.8 61.0 61.2 61.4 61.6 61.8 62.0 -50 -25 0 25 50 75 100 125 current (ma) temperature ( c) dac drive current limit vs. temperature dac = 0v, shorted to v ddio toc27 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range - 10v to 0) toc25c v avdd = 4.75v v avdd = 5v v avdd = 5.25v 0.000 0.100 0.200 0.300 0.400 0.500 0.600 0.700 0.800 0.900 1.000 -50 -25 0 25 50 75 100 125 voltage (v) temperature ( c) dac v oh and v ol vs. temperature (i load = 25ma) toc26 v oh v ol 60.0 60.2 60.4 60.6 60.8 61.0 61.2 61.4 61.6 61.8 62.0 -50 -25 0 25 50 75 100 125 current (ma) temperature ( c) dac drive current limit vs. temperature dac = 10v, shorted to v ssio toc28 maxim integrated g 16 typical operating characteristics (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 4.7 4.8 4.9 5 5.1 5.2 5.3 offset (mv) supply voltage (v) vth = 0.9v vth = 1.65v vth = 2.5v gpi offset vs. supply voltage toc32 v th = 0.9v v th = 1.65v v th = 2.5v 20 22 24 26 28 30 32 34 36 38 40 -50 -25 0 25 50 75 100 125 hysteresis ( mv) temperature ( c) vth = 0.9v vth = 1.65v vth = 2.5v gpi hysteresis vs. temperature toc34 v th = 0.9v v th = 1.65v v th = 2.5v -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -50 -25 0 25 50 75 100 125 temperature error ( c) temperature ( c) external temperature sensor error vs. temperature toc36 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 offset (mv) temperature ( c) vth = 0.9v vth = 1.65v vth = 2.5v gpi offset vs. temperature toc33 v th = 0.9v v th = 1.65v v th = 2.5v -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 -50 -25 0 25 50 75 100 125 temperature error ( c) temperature ( c) internal temperature sensor error vs. temperature toc35 20v/div toc30 1s/div dac output noise internal reference (0.1hz to 10hz) 20v/div toc31 1s/div dac output noise external reference (0.1hz to 10hz) maxim integrated g 17 typical operating characteristics (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
tqfn 6mm x 6mm max11300 top view dvdd sclk cs dout int dgnd port8 port6 port5 port9 port10 port11 port4 avddio port13 port14 port15 port2 port1 port0 agnd din port7 port16 avdd port17 port18 port19 d0n d0p dac_ref + avddio d1p agnd1 d1n cnvt adc_int_ref adc_ext_ref port3 port12 20 19 18 17 16 15 14 13 12 11 21 10 9 8 7 6 5 4 3 2 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 ep maxim integrated 18 3lqrqjxudwlrqv max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port 11 port10 avssio port9 port8 port7 port6 avssio port5 port4 avddio port3 port19 dgnd dvdd din sclk cs dout int cnvt adc_int_ref adc_ext_ref dac_ref 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 agnd agnd port1 d1p d1n avssio tqfp 9mm x 9mm d 0p d0n avdd avdd 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 avssio port18 port17 port16 avssio port15 port14 port13 avddio agnd1 port12 max11300 port2 port0 avssio ep maxim integrated 19 3lqrqjxudwlrqvfrqwlqxhg max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
pin name function tqfn tqfp 1 2 dgnd digital ground 2 3 dvdd positive digital supply 3 4 din serial interface data input 4 5 sclk serial interface clock input 5 6 cs serial interface chip-selectCactive low 6 7 dout serial interface data output 7 8 int interrupt open-drain output. active low. 8 9 cnvt adc trigger control input. active low. 9 10 adc_int_ref adc internal voltage reference output. connect a bypass capacitor at this pin (4.7f to 10f). 10 11 adc_ext_ref adc external voltage reference input. connect a bypass capacitor at this pin (4.7f recommended). 11 12 dac_ref dac external/internal voltage reference input. connect a bypass capacitor at this pin (4.7f to 10f). 12 13 d0p 1st external temperature sensor positive input 13 14 d0n 1st external temperature sensor negative input 14 15, 16 avdd positive analog supply. for tqfp, connect both pins to avdd. 15 17, 18 agnd analog ground. for tqfp, connect both pins to agnd. 16 19 port0 confgurable mixed-signal port 0 17 20 port1 confgurable mixed-signal port 1 18 21 port2 confgurable mixed-signal port 2 19 22 d1p 2nd external temperature sensor positive input 20 23 d1n 2nd external temperature sensor negative input 21 25 port3 confgurable mixed-signal port 3 22, 33 26, 39 avddio analog positive supply for mixed-signal ports. connect both pins to avddio. 23 27 port4 confgurable mixed-signal port 4 24 28 port5 confgurable mixed-signal port 5 25 30 port6 confgurable mixed-signal port 6 26 31 port7 confgurable mixed-signal port 7 27 32 port8 confgurable mixed-signal port 8 28 33 port9 confgurable mixed-signal port 9 29 35 port10 confgurable mixed-signal port 10 30 36 port11 confgurable mixed-signal port 11 31 37 port12 confgurable mixed-signal port 12 32 38 agnd1 analog ground. maxim integrated 20 pin description max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
pin name function tqfn tqfp 34 40 port13 confgurable mixed-signal port 13 35 42 port14 confgurable mixed-signal port 14 36 43 port15 confgurable mixed-signal port 15 37 45 port16 confgurable mixed-signal port 16 38 46 port17 confgurable mixed-signal port 17 39 47 port18 confgurable mixed-signal port 18 40 1 port19 confgurable mixed-signal port 19 24, 29, 34, 41, 44, 48 avssio analog negative supply for mixed-signal ports. for tqfp, connect all pins to avssio.. ep exposed pad. for tqfn, connect ep to avssio. for tqfp, connect ep to agnd. maxim integrated 21 pin description (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
pa biasing solution thermal probe temperature sensor and monitor tdd driver pa max11300 board gpi digital controller r s csa adc dac filter dac maxim integrated 22 typical application circuits max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
control and monitoring solution maxim integrated 23 fpga csa rs csa rs csa rs csa rs adc adc adc adc 5 v, 2a 3.3v, 1a 1.8v, 1a 1.5v, 1a 5v adc adc adc adc 3 .3v 1.8v 1.5v temperature sensor and monitor thermal probe max11300 cooling fan dac soft switch digital controller gpo gpo max44285 max44285 max44285 max44285 red led green led typical application circuits (continued) max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
detailed description functional overview the max11300 has 20 configurable mixed-signal i/o ports. each port is independently configured as a dac output, an adc input, a gpi, a gpo, or an analog switch terminal. user-controllable parameters are available for each of those configurations. the device offers one internal and two external temperature sensors. the serial interface operates as a spi mode 0 interface. the dac is used to drive out a voltage defined by the dac data register of the dac-configured ports. the dac uses either an internal or external voltage reference. the selection of the voltage reference is set for all the ports and cannot be configured on a port-by-port basis. the adc converts voltages applied to the adc-configured ports. the adc can operate in single-ended mode or in differential mode, by which any two ports can form a dif - ferential pair. the port configured as the negative input of the adc can be used by more than one differential adc input pairs. the adc uses either an internal or external voltage reference. in some configurations, the adc uses the dac voltage reference. the adc voltage reference selection can be configured on a port-by-port basis. interrupts provide the host with the occurrence of user- selected events through the configuration of an interrupt mask register. adc operations the adc is a 12-bit, low-power, successive approxima - tion analog-to-digital converter, capable of sampling a single input at up to 400ksps. the adcs conversion rate can be programmed to 400ksps, 333ksps, 250ksps, or 200ksps. the default conversion rate setting is 200ksps. each adc-configured port can be programmed for one of four input voltage ranges: 0v to +10v, -5v to +5v, -10v to 0v, and 0v to +2.5v. the adc uses the internal adc 2.5v voltage reference, the external adc voltage reference, or, in some cases, the dac voltage reference. the voltage reference can be selected on a port-by-port basis. adc control the adc can be triggered using an external signal cnvt or from a control bit. cnvt is active-low and must remain low for a minimal duration of 0.5 s to trigger a conver - sion. four configurations are available: ? idle mode (default setting). ? single sweep mode. the adc sweeps sequentially the adc-configured ports, from the lowest index port to the highest index port, once cnvt is asserted. ? single conversion mode. the adc performs a single conversion at the current port in the series of adc- configured ports when cnvt is asserted. ? continuous sweep mode. the adc continuously sweeps the adc-configured ports. the cnvt port has no effect in this mode. adc averaging function adc-configured ports can be configured to average blocks of 2, 4, 8, 16, 32, 64, or 128 conversion results. the corresponding adc data register is updated only when the averaging is completed, thus decreasing the throughput proportionally. if the number of samples to average is modified for a given port, the content of the adc data register for that port is cleared before starting to average the new block of samples. adc mode change when users change the adc active mode (continuous sweep, single sweep, or single conversion), the adc data registers are reset. however, adc data registers retain content when the adc is changed to idle mode. adc confgurations the adc can operate in single-ended, differential, or pseudo-differential mode. in single-ended mode, the pixi port is the positive input to the adc while the negative input is grounded internally ( figure 3 ). in differential mode ( figure 4 ), any pair of pixi ports can be configured as inputs to the differential adc. in pseudo-differential mode ( figure 5 ), one pixi port produces the voltage applied to the negative input of the adc while another pixi port forms the positive input. the adc data format is straight binary in single-ended mode, and twos complement in differential and pseudo- differential modes. dac operations the max11300 uses a 12-bit dac, which operates at the rate of 40s per port. since up to 20 ports can be config - ured in dac-related modes, the minimum refresh rate per port is 1.25khz. no external component is required to set the offset and gain of the dac drivers. the pixi port driver features a wide output voltage range of 10v and high current capa - bility with dedicated power supplies (avddio, avssio). the dac uses either the internal or external voltage refer - ence. unlike the adc, the dac voltage reference cannot be configured on a port-by-port basis. dac mode configu - ration is illustrated in figure 6 . maxim integrated g 24 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
figure 4. adc with differential inputs figure 5. adc with pseudo-differential input set by dac figure 3. adc with single-ended input adc spi serial interface any port 12 bits up to 400ksps scaling block reference mux any other port scaling block sequencer adc _ int_ref adc_ext_ref int cnvt digital core adc spi serial interface any port scaling block reference mux any other port scaling block sequencer dac dac _ ref internal or external for all ports scaling block sequencer adc_int_ref adc_ext_ref int cnvt digital core adc spi serial interface port 12 bits up to 400 ksps scaling block reference mux adc _ int _ ref adc _ ext _ ref int sequencer cnvt digital core maxim integrated 25 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
dac operations can be monitored by the adc. in such a mode, the adc samples the dac-configured port to allow the host to monitor that the voltage at the port is within expectations given the accuracy of the adc and dac. this adc monitoring mode is shown in figure 7 . by default, the dac updates the dac-configured ports sequentially. however, users can configure the dac so that its sequence can jump to update the port that just received new data to convert. after having updated this port, the dac continues its default sequence from that port. in that mode, users should allow a minimum of 80s between dac data register updates for subsequent jump operations. figure 6. dac configuration figure 7. dac configuration with adc monitoring spi serial interface digital core sequencer scaling block port 40s to 1 lsb dac_ref internal or external for all ports dac 0ma 25ma current limit at 50ma int spi serial interface digital core sequencer scaling block port adc reference mux scaling block sequencer dac _ ref internal or external for all ports adc_int_ref dac_ref dac int cnvt maxim integrated g 26 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
in addition to port-specific dac data registers, the host can also use the same data for all dac-related ports using one of two preset dac data registers. all dac output drivers are protected by overcurrent limit circuitry. in case of overcurrent, the max11300 generates an interrupt. detailed status registers are offered to the host to determine which ports are current limited. general-purpose input and output each pixi port can be configured as a gpi or a gpo. the gpi threshold ( figure 8 ) is adjusted by setting the dac data register of that gpi port to the corresponding voltage. if the dac data register is set at 0x0fff, the gpi threshold is the dac reference voltage. the amplitude of the input signal must be contained within 0v to v avdd . the gpi- configured port can be set to detect rising edges, falling edges, either rising or falling edges, or none. when a port is configured as gpo ( figure 9 ), the ampli - tude of its logic-one level is set by its dac data register. if the dac data register is set at 0x0fff, the gpo logic-one level is four times the dac reference voltage. the logic- zero level is always 0v. the host can set the logic state of gpo-configured ports through the corresponding gpo data registers. figure 8. gpi mode figure 9. gpo mode dac spi serial interface port gpi 30 mv hysteresis sequencer dac _ ref internal or external for all ports digital core int spi serial interface gpo scaling block dac digital core port current limit at 50 m a sequencer dac _ ref internal or external for all ports int maxim integrated 27 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
unidirectional and bidirectional level translator operations by combining gpi- and gpo-configured ports, unidirection - al level translator paths can be formed. the signaling at the input of the path can be different from the signaling at the end ( figure 10 ). for example, a unidirectional path could convert a signal from 1.8v logic level to 3.3v logic level. the unidirectional path configuration allows for the trans - mission of signals received on a gpi-configured port to one or more gpo-configured ports. pairs of adjacent pixi ports can also form bidirectional level translator paths that are targeted to operate with open-drain drivers ( figure 11 ). when used as a bidi - rectional level translator, the pair of pixi ports must be accompanied with external pullup resistors to meet proper logic levels. figure 10. unidirectional level translator path mode figure 11. bidirectional level translation application diagram gpo scaling block any other port gpi any port sequencer sequencer spi serial interface digital core dac dac dac_ref internal or external for all ports int logic controller chip1 with vdd1 logic level vdd 1 pixi[i] pixi[i+1] vdd2 logic controller chip 2 with vdd2 logic level max11300 maxim integrated 28 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internally or externally controlled analog switch operation two adjacent pixi ports can form a 60 analog switch that is controlled by two different configurations. in one configuration, the switch is dynamically controlled by any other gpi-configured pixi port, as illustrated in figure 12 . the signal applied to that gpi-configured port can be inverted. in the other configuration, the switch is programmed to be permanently on by configuring the corresponding pixi port. to turn the switch off, the host must set that pixi port in high-impedance configuration. power-supply brownout detection the max11300 features a brownout detection circuit that monitors avddio and avdd pins. when avddio goes below approximately 4.0v, an interrupt is registered, and the interrupt port is asserted if not masked. when avdd goes below approximately 4.0v, the device resets. spi operations the max11300 spi interface complies with the timing of mode 0, as illustrated in figure 13 . the max11300 samples incoming data on the rising edge of sclk and releases outgoing data on the falling edge of sclk. figure 13. spi timing (mode 0) figure 12. pixi ports as a controllable analog switch sclk din dout cs b23 b 22 b21 b 3 b2 b1 b0 b0 b23 b22 b21 b 3 b2 b1 gpi any other port pixi port[i+1] pixi port[i] maxim integrated 29 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
spi transactions are made of a minimum of three bytes. each transaction is defined by the assertion of cs . the first byte contains the address and the read/write bit. the second byte carries the most significant byte of the data to either write or read. the third byte contains the least significant byte of the data to either write or read. such a transaction is shown in table 1 . for write transactions, the targeted register content is modified only after the third byte has been fully received. the bits come out of dout (or come in din), most significant bit first. note that the duration of the transaction is determined by the assertion of cs . if cs remains asserted past the third byte, and if sclk remains active past the third byte, the max11300 assumes that a second data sample is received (or transmitted) corresponding to the next reg - ister address. the address keeps on incrementing as cs remains asserted and sclk remains active. table 2 shows an example of such a burst transaction. each time a new data sample is read or written, the regis - ter address is incremented by one until it reaches the last register address. if a transaction targets an unused address, nothing is written within the max11300 for write transactions, and all zeros are read back for read transactions. similarly, if a write transaction targets a read-only register, nothing is written to the device. burst transaction address incrementing modes with a burst transaction, the address of the initial register is entered once. the data of the targeted register can then be written or read. if the serial clock keeps running, and if cs remains asserted, the device increments the address pointer and writes or reads the next data after the next 16 serial clock periods. this scheme goes on until cs is deasserted. there are two address incrementing modes. in one mode, the address is simply incremented by one (default mode), while in the other, the address is incremented contextu - ally. when writing dac data registers in a burst fashion using contextual addressing, the host would write the address of the first port that is dac-configured (starting from the lowest port index). as cs remains asserted and another set of 16 serial clock cycles are received, the next dac-configured port is written. this scheme continues until the last dac-configured port is reached. at that point, any additional serial clock cycle results in looping back to the first dac-configured port. the contextual addressing scheme is only valid for writ - ing dac data registers, as described above, and reading adc data registers. interrupt operations the max11300 issues interrupts to alert the host of vari - ous events. all events are recorded by the interrupt reg - ister. the assertion of an interrupt register bit results in the assertion of the interrupt port ( int ) if that interrupt bit table 2. multiple register spi transaction format table 1. single register spi transaction format b7 b6 b5 b4 b3 b2 b1 b0 1st byte address_n[6:0] r/wb 2nd byte data_n[15:8] 3rd byte data_n[7:0] 4th byte data_n+1[15:8] 5th vyte data_n+1[7:0] 6th byte data_n+2[15:8] 7th byte data_n+2[7:0] 8th vyte data_n+3[15:8] 9th byte data_n+3[7:0] 10th byte data_n+4[15:8] 11th byte data_n+4[7:0] b7 b6 b5 b4 b3 b2 b1 b0 1st byte address[6:0] r/wb 2nd byte data[15:8] 3rd byte data[7:0] maxim integrated 30 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
is not masked. by default, all interrupts are masked upon power-up or reset. the interrupts are listed hereafter. the adcflag (adc flag) interrupt indicates that the adc just completed a conversion or set of conversions. it is asserted either at the end of a conversion when the adc is in single-conversion mode or at the end of a sweep when the adc is either in single-sweep mode or continuous-sweep mode. adcflag is cleared when the interrupt register is read. the adcdr (adc data ready) interrupt is asserted when at least one adc data register is refreshed. since one conversion per adc-configured port is performed per sweep, many sweeps may be required before refresh - ing the data register of a given adc-configured port that utilizes the averaging function. see the adc averaging function section. to determine which adc-configured port received a new data sample, the host must read the adc status registers. adcdr is cleared after the interrupt register and both adc status registers are read subsequently. the adcdm (adc data missed) interrupt is asserted when any adc data register is not read by the host before new data is stored in that adc data register. adcdm is cleared after the interrupt register is read. the gpier (gpi event received) interrupt indicates that an event has been received on one of the gpi-configured ports. each gpi port can be configured to generate an interrupt for an event such as detecting a rising edge, a falling edge, or either edge at the corresponding port. if the gpi port is configured to detect no edge, it is equiva - lent to masking the interrupt related to that port. a gpi sta - tus register allows the host to identify which port detected the event. gpier is cleared after the interrupt register and both gpi status registers are read subsequently. the gpiem (gpi event missed) interrupt informs the host that it did not service the gpi interrupt caused by the occurrence of an event recorded by gpi status registers before another event was received on the same port. the host must read the interrupt register and the gpi status registers whenever a gpi event received interrupt occurs; otherwise, the gpiem register is asserted upon receiving the next event. this interrupt must be used in conjunction with the gpier interrupt bit to operate properly. gpiem is cleared after the interrupt register and both gpi status registers are read subsequently. the dacoi (dac overcurrent) interrupt indicates that a dac-configured port current exceeded approximately 50ma. this limit is not configurable. a dac overcurrent status register allows the host to identify which dac- configured port exceeded the 50ma current limit. dacoi is cleared after the interrupt register is read, and both dac overcurrent status registers are read subsequently. the tmpint[2:0] (internal temperature monitor) interrupt has three sources of interrupt, each independently con - trollable: a new internal temperature value is ready, the internal temperature value exceeds the maximum limit, or the internal temperature value is below the minimum limit. tmpint is cleared after the interrupt register is read. the tmpext1[2:0] (1st external temperature monitor) interrupt has three sources of interrupt, each indepen - dently controllable: a new first external temperature value is ready, the first external temperature value exceeds the maximum limit, or the first external temperature value is below the minimum limit. tmpext1 is cleared after the interrupt register is read. the tmpext2[2:0] (2nd external temperature monitor) interrupt has three sources of interrupt, each indepen - dently controllable: a new second external temperature value is ready, the second external temperature value exceeds the maximum limit, or the second external tem - perature value is below the minimum limit. tmpext2 is cleared after the interrupt register is read. the vmon (high-voltage supply monitor) interrupt is trig - gered when avddio supply voltage falls below approxi - mately 4v. vmon is cleared after the interrupt register is read. temperature sensors overview the max11300 integrates one internal and two external temperature sensors. the external sensors are diode- connected transistors, typically a low-cost, easily mount - ed 2n3904 npn type, that replace conventional thermis - tors or thermocouples. the external sensors accuracy is typically 1c over the -40 c to +150 c temperature range with no calibration necessary. u se of a transistor with a different ideality factor produces a proportionate dif - ference in the absolute measured temperature. parasitic series resistance results in a temperature reading error of about 0.25 c per ohm of resistance. the max11300 features a series resistance cancellation mode (rs_ cancel) that eliminates this error for resistances up to 10 ohms. the external sensors can also measure the die temperature of other ics, such as microprocessors, that contain a substrate-connected diode available for temperature-sensing purposes. temperature data can be read from the temperature data registers. the tempera - ture data format is in twos complement, with one lsb representing 0.125c. maxim integrated 31 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 3. register table register description register bits that are shown unused do not impact device functionality and read out as 0. address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x00 device id devid[15:0] 0x0024 0x01 interrupt vmon tmpext2[2:0] tmpext1[2:0] tmpint[2:0] dacoi gpidm gpidr adcdm adcdr adcflag 0x0000 0x02 adc data status; ports 0-15 adcst[15:0] 0x0000 0x03 adc data status; ports 16-19 unused adcst[19:16] 0x0000 0x04 overcurrent status; ports 0-15 dacoist[15:0] 0x0000 0x05 overcurrent status; ports 16-19 unused dacoist[19:16] 0x0000 0x06 gpi status; ports 0-15 gpist[15:0] 0x0000 0x07 gpi status; ports 16-19 unused gpist[19:16] 0x0000 0x08 internal temperature data unused tmpintdat[11:0] 0x0000 0x09 1 st external temperature data unused tmpext1dat[11:0] 0x0000 0x0a 2 nd external temperature data unused tmpext2dat[11:0] 0x0000 0x0b gpi data; ports 15-0 gpidat[15:0] 0x0000 0x0c gpi data; ports 19-16 unused gpidat[19:16] 0x0000 0x0d gpo data; ports 15-0 gpodat[15:0] 0x0000 0x0e gpo data; ports 19-16 unused gpodat[19:16] 0x0000 0x10 device control reset brst lpen rs_cancel tmpper tmpctl[2:0] thshdn dacref adcconv[1:0] dacctl[1:0] adcctl[1:0] 0x0000 0x11 interrupt mask vmon msk tmpext2 msk[2:0] tmpext1 msk[2:0] tmpint msk[2:0] dacoi msk gpid mmsk gpidr msk adcdm msk adcdr msk adcflag msk 0xffff 0x12 gpi irq mode; ports 0-7 gpimd_7[1:0] gpimd_6[1:0] gpimd_5[1:0] gpimd_4[1:0] gpimd_3[1:0] gpimd_2[1:0] gpimd_1[1:0] gpimd_0[1:0] 0x0000 maxim integrated 32 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 3. register table (continued) address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x13 gpi irq mode; ports 8-15 gpimd_15[1:0] gpimd_14[1:0] gpimd_13[1:0] gpimd_12[1:0] gpimd_11[1:0] gpimd_10[1:0] gpimd_9[1:0] gpimd_8[1:0] 0x0000 0x14 gpi irq mode; ports 16-19 unused gpimd_19[1:0] gpimd_18[1:0] gpimd_17[1:0] gpimd_16[1:0] 0x0000 0x16 dac preset data #1 unused dacprstdat1[11:0] 0x0000 0x17 dac preset data #2 unused dacprstdat2[11:0] 0x0000 0x18 t emperature monitor confguration unused tmpext2moncfg [1:0] tmpext1moncfg [1:0] tmpintmoncfg [1:0] 0x0000 0x19 internal temperature high threshold unused tmpinthi[11:0] 0x07ff 0x1a internal temperature low threshold unused tmpintlo[11:0] 0x0800 0x1b 1 st external temperature high threshold unused tmpext1hi[11:0] 0x07ff 0x1c 1 st external temperature low threshold unused tmpext1lo[11:0] 0x0800 0x1d 2 nd external temperature high threshold unused tmpext2hi[11:0] 0x07ff 0x1e 2 nd external temperature low threshold unused tmpext2lo[11:0] 0x0800 0x20 port 0 confguration funcid_0[3:0] funcprm_0[11:0] 0x0000 0x21 port 1 confguration funcid_1[3:0] funcprm_1[11:0] 0x0000 0x22 port 2 confguration funcid_2[3:0] funcprm_2[11:0] 0x0000 0x23 port 3 confguration funcid_3[3:0] funcprm_3[11:0] 0x0000 0x24 port 4 confguration funcid_4[3:0] funcprm_4[11:0] 0x0000 maxim integrated 33 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 3. register table (continued) address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x25 port 5 confguration funcid_5[3:0] funcprm_5[11:0] 0x0000 0x26 port 6 confguration funcid_6[3:0] funcprm_6[11:0] 0x0000 0x27 port 7 confguration funcid_7[3:0] funcprm_7[11:0] 0x0000 0x28 port 8 confguration funcid_8[3:0] funcprm_8[11:0] 0x0000 0x29 port 9 confguration funcid_9[3:0] funcprm_9[11:0] 0x0000 0x2a port 10 confguration funcid_10[3:0] funcprm_10[11:0] 0x0000 0x2b port 11 confguration funcid_11[3:0] funcprm_11[11:0] 0x0000 0x2c port 12 confguration funcid_12[3:0] funcprm_12[11:0] 0x0000 0x2d port 13 confguration funcid_13[3:0] funcprm_13[11:0] 0x0000 0x2e port 14 confguration funcid_14[3:0] funcprm_14[11:0] 0x0000 0x2f port 15 confguration funcid_15[3:0] funcprm_15[11:0] 0x0000 0x30 port 16 confguration funcid_16[3:0] funcprm_16[11:0] 0x0000 0x31 port 17 confguration funcid_17[3:0] funcprm_17[11:0] 0x0000 0x32 port 18 confguration funcid_18[3:0] funcprm_18[11:0] 0x0000 0x33 port 19 confguration funcid_19[3:0] funcprm_19[11:0] 0x0000 0x40 port 0 adc data unused adcdat_0[11:0] 0x0000 0x41 port 1 adc data unused adcdat_1[11:0] 0x0000 0x42 port 2 adc data unused adcdat_2[11:0] 0x0000 0x43 port 3 adc data unused adcdat_3[11:0] 0x0000 maxim integrated 34 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x44 port 4 adc data unused adcdat_4[11:0] 0x0000 0x45 port 5 adc data unused adcdat_5[11:0] 0x0000 0x46 port 6 adc data unused adcdat_6[11:0] 0x0000 0x47 port 7 adc data unused adcdat_7[11:0] 0x0000 0x48 port 8 adc data unused adcdat_8[11:0] 0x0000 0x49 port 9 adc data unused adcdat_9[11:0] 0x0000 0x4a port 10 adc data unused adcdat_10[11:0] 0x0000 0x4b port 11 adc data unused adcdat_11[11:0] 0x0000 0x4c port 12 adc data unused adcdat_12[11:0] 0x0000 0x4d port 13 adc data unused adcdat_13[11:0] 0x0000 0x4e port 14 adc data unused adcdat_14[11:0] 0x0000 0x4f port 15 adc data unused adcdat_15[11:0] 0x0000 0x50 port 16 adc data unused adcdat_16[11:0] 0x0000 0x51 port 17 adc data unused adcdat_17[11:0] 0x0000 0x52 port 18 adc data unused adcdat_18[11:0] 0x0000 0x53 port 19 adc data unused adcdat_19[11:0] 0x0000 0x60 port 0 dac data unused dacdat_0[11:0] 0x0000 0x61 port 1 dac data unused dacdat_1[11:0] 0x0000 0x62 port 2 dac data unused dacdat_2[11:0] 0x0000 0x63 port 3 dac data unused dacdat_3[11:0] 0x0000 0x64 port 4 dac data unused dacdat_4[11:0] 0x0000 table 3. register table (continued) table 3. register table (continued) maxim integrated 35 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x65 port 5 dac data unused dacdat_5[11:0] 0x0000 0x66 port 6 dac data unused dacdat_6[11:0] 0x0000 0x67 port 7 dac data unused dacdat_7[11:0] 0x0000 0x68 port 8 dac data unused dacdat_8[11:0] 0x0000 0x69 port 9 dac data unused dacdat_9[11:0] 0x0000 0x6a port 10 dac data unused dacdat_10[11:0] 0x0000 0x6b port 11 dac data unused dacdat_11[11:0] 0x0000 0x6c port 12 dac data unused dacdat_12[11:0] 0x0000 0x6d port 13 dac data unused dacdat_13[11:0] 0x0000 0x6e port 14 dac data unused dacdat_14[11:0] 0x0000 0x6f port 15 dac data unused dacdat_15[11:0] 0x0000 0x70 port 16 dac data unused dacdat_16[11:0] 0x0000 0x71 port 17 dac data unused dacdat_17[11:0] 0x0000 0x72 port 18 dac data unused dacdat_18[11:0] 0x0000 0x73 port 19 dac data unused dacdat_19[11:0] 0x0000 table 3. register table (continued) table 3. register table (continued) maxim integrated 36 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
register detailed description device id register (read) interrupt register (read) bit field name description 0 adcflag adc fag interrupt ? asserted when the adc completes a conversion (adc set in single-conversion mode) or when the adc completes a sweep (adc set in single-sweep or continuous-sweep mode). ? no interrupt is generated when the adc is in idle mode. ? cleared after the interrupt register is read. 1 adcdr adc data ready interrupt ? vvhuwhgkhqdqgdwduhjlvwhuuhfhlyhvdqhgdwdvdpsoh,idsruwlvfrqjxuhgwr average 2 n samples, it takes 2 n sweeps for that port data register to be refreshed and assert adcdr. ? data registers are refreshed either at the end of a conversion (adc set in single-conversion mode) or at the end of a sweep (adc set in single-sweep or continuous-sweep mode). ? cleared after the interrupt register is read, and after both adcst[15:0] and adcst[19:16] registers are read subsequently. 2 adcdm adc data missed interrupt ? asserted when the host missed reading a ports adc data register by the time that ports adc data register is overwritten by new data. ? cleared after the interrupt register is read. 3 gpidr gpi event ready interrupt ? vvhuwhgkhqdqhhyhqwlvfdswxuhge*3,frqjxuhgsruwv7khwshrihyhqwlvvhwewkh corresponding gpi irq mode register. the host can then consult gpist[15:0] and gpist[19:16] registers to identify the port that caused the interrupt. ? cleared after the interrupt register is read, and after both gpist[15:0] and gpist[19:16] are read subsequently. 4 gpidm gpi event missed interrupt ? asserted when the host missed reading the gpi status register by the time that register is overwritten. ? must be used in conjunction with gpidr for proper operation. ? cleared after the interrupt register is read, and after both gpist[15:0] and gpist[19:16] are read subsequently. 5 dacoi dac driver overcurrent interrupt ? asserted when the dac driver current exceeds approximately 50ma. the host can then read dacoist[15:0] and dacoist[19:16] to identify the port that caused the interrupt. ? cleared after the interrupt register is read, and after both dacoist[15:0] and dacoist[19:16] registers are read subsequently. bit field name description 15:0 devid[15:0] device id ? 0000_0000_0010_0100 maxim integrated g 37 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
interrupt register (read) (continued) adc status registers (read) overcurrent status registers (read) bit field name description 8:6 tmpint[2:0] internal temperature interrupts ? tmpint[2]: asserted when the internal temperature value is larger than the value stored in tmpinthi[11:0]. cleared after the interrupt register is read. ? tmpint[1]: asserted when the internal temperature value is lower than the value stored in tmpintlo[11:0]. cleared after the interrupt register is read. ? tmpint[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 11:9 tmpext1[2:0] 1st external temperature interrupts ? tmpext1[2]: asserted when the 1st external temperature value is larger than the value stored in tmpext1hi[11:0]. cleared after the interrupt register is read. ? tmpext1[1]: asserted when the 1st external temperature value is lower than the value stored in tmpext1lo[11:0]. cleared after the interrupt register is read. ? tmpext1[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 14:12 tmpext2[2:0] 2nd external temperature interrupts ? tmpext2[2]: asserted when the 2nd external temperature value is larger than the value stored in tmpext2hi[11:0]. cleared after the interrupt register is read. ? tmpext2[1]: asserted when the 2nd external temperature value is lower than the value stored in tmpext2lo[11:0]. cleared after the interrupt register is read. ? tmpext2[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 15 vmon high-voltage supply monitor interrupt ? asserted when the high voltage supply (avddio) falls below approximately 4v. ? cleared after the interrupt register is read. bit field name description 15:0 3:0 adcst[15:0] adcst[19:16] status of adc data received for ports 0 to 19 ? once new data is written in an adc data register, the corresponding adcst bit is asserted. the new data is written only after the set of samples to average is collected when the averaging function is enabled. ? this register content is not affected by any related interrupt mask. activity on adc-confgured ports is recorded by this register regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both adcst[15:0] and adcst[19:16] registers are read, subsequently . bit field name description 15:0 3:0 dacoist[15:0] dacoist[19:16] status of dac drivers overcurrent for ports 0 to 19 ? once a port driver exceeds approximately 50ma, the host can identify which driver caused the interrupt by reading dacoist[15:0] and dacoist[19:16]. ? this register content is not affected by any related interrupt mask. activity on overcurrent detection is recorded by these registers regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both dacoist[15:0] and dacoist[19:16] registers are read, subsequently.. maxim integrated 38 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internal temperature data register (read) 1st external temperature data register (read) 2nd external temperature data register (read) gpi status registers (read) bit field name description 11:0 tmpintdat [11:0] internal temperature measurement data ? temperature measurement produced by the internal temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 11:0 tmpext1dat [11:0] 1st external temperature measurement data ? temperature measurement produced by the frst external temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 11:0 tmpext2dat [11:0] 2nd external temperature measurement data ? temperature measurement produced by the second external temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 15:0 3:0 gpist[15:0] gpist[19:16] status of gpi event detection for ports 0 to 19 ? asserted when an event is detected on a gpi-confgured port. the type of event to detect is set by the corresponding gpi irq register. ? once a gpidt interrupt is generated, the host can identify which gpi port(s) caused the interrupt by reading gpist[15:0] and gpist[19:16] registers. ? gpist content is not affected by any related interrupt mask. activity on gpi-confgured ports is recorded by gpist regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both gpist[15:0] and gpist[19:16] registers are read, subsequently . maxim integrated 39 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
interrupt mask register (read/write) bit field name description 0 adcflagmsk adc fag interrupt mask ? masks adcflag interrupt bit when asserted. ? in adc continuous-sweep mode, int is asserted for 100ns at the end of each sweep whether adcflag interrupt is cleared or not. ? 1: prevents the assertion of adcflag interrupt bit from pulling int low. ? 0: allows the assertion of adcflag interrupt bit to pull int low. 1 adcdrmsk adc data ready interrupt mask ? masks adcdr interrupt bit when asserted. ? 1: prevents the assertion of adcdr interrupt bit from pulling int low. ? 0: allows the assertion of adcdr interrupt bit to pull int low. 2 adcdmmsk adc data missed interrupt mask ? masks adcdm interrupt bit when asserted. ? 1: prevents the assertion of adcdm interrupt bit from pulling int low. ? 0: allows the assertion of adcdm interrupt bit to pull int low. 3 gpidrmsk gpi event ready interrupt ? masks gpidr interrupt bit when asserted. ? supersedes the settings in the gpi irq mode registers. ? 1: prevents the assertion of gpidr interrupt bit from pulling int low. ? 0: allows the assertion of gpidr interrupt bit to pull int low. 4 gpidmmsk gpi event missed interrupt mask ? masks gpidm interrupt bit when asserted. ? can be deasserted only if gpidrmsk is deasserted. ? 1: prevents the assertion of gpidm interrupt bit from pulling int low. ? 0: allows the assertion of gpidm interrupt bit to pull int low. 5 dacoimsk dac driver overcurrent interrupt mask ? masks dacoi interrupt bit when asserted. ? 1: prevents the assertion of dacoi interrupt bit from pulling int low. ? 0: allows the assertion of dacoi interrupt bit to pull int low. 8:6 tmpintmsk[2:0] internal temperature interrupt mask ? masks tmpint[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpint[i] interrupt bit from pulling int ? 0: allows the assertion of tmpint[i] interrupt bit to pull int 11:9 tmpext1msk[2:0] 1st external temperature interrupt mask ? masks tmpext1[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpext1[i] interrupt bit from pulling int ? 0: allows the assertion of tmpext1[i] interrupt bit to pull int 14:12 tmpext2msk[2:0] 2nd external temperature interrupt mask ? masks tmpext2[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpext2[i] interrupt bit from pulling int ? 0: allows the assertion of tmpext2[i] interrupt bit to pull int 15 vmonmsk high-voltage supply monitor mask ? masks vmon interrupt bit when asserted. ? 1: prevents the assertion of vmon interrupt bit from pulling int low. ? 0: allows the assertion of vmon interrupt bit to pull int low. maxim integrated g 40 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
gpi irq mode registers (read/write) device control register (read/write) bit field name description 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 1:0 3:2 5:4 7:6 gpimd_0[1:0] gpimd_1[1:0] gpimd_2[1:0] gpimd_3[1:0] gpimd_4[1:0] gpimd_5[1:0] gpimd_6[1:0] gpimd_7[1:0] gpimd_8[1:0] gpimd_9[1:0] gpimd_10[1:0] gpimd_11[1:0] gpimd_12[1:0] gpimd_13[1:0] gpimd_14[1:0] gpimd_15[1:0] gpimd_16[1:0] gpimd_17[1:0] gpimd_18[1:0] gpimd_19[1:0] gpi interrupt request mode for ports 0 to 19 ? each input port is controlled by gpimd, a 2-bit code. ? for a given port i (0i19): ? gpimd_i[1:0] = 00: gpist[i] is never asserted ? gpimd_i[1:0] = 01: gpist[i] is asserted upon detection of a positive edge ? gpimd_i[1:0] = 10: gpist[i] is asserted upon detection of a negative edge ? gpimd_i[1:0] = 11: gpist[i] is asserted upon detection of a positive or a negative edge bit field name description 1:0 adcctl[1:0] adc conversion mode selection ? 00: idle mode C the adc does not perform any conversion. ? 01: single sweep C the adc performs one conversion for each of the adc-confgured ports sequentially. the assertion of cnvt triggers the single sweep. the sweep starts with the adc-confgured port of lowest index and stops with the adc-confgured port of highest index. ? 10: single conversion C the adc performs one conversion for the current port. it starts with the lowest index port that is adc-confgured, and it progresses to higher index ports as cnvt is asserted. ? 11: continuous sweep C this mode is not controlled by cnvt . the adc continuously sweeps the adc-confgured ports. 3:2 dacctl[1:0] dac mode selection ? 00: sequential update mode for dac-confgured ports. ? 01: immediate update mode for dac-confgured ports. the dac-confgured port that received new data is the next port to be updated. after updating that port, the dac- confgured port update sequence continues from that port onward. a minimum of 80s must be observed before requesting another immediate update. ? 10: all dac-confgured ports use the same data stored in dacprstdat1[11:0]. ? 11: all dac-confgured ports use the same data stored in dacprstdat2[11:0]. 5:4 adcconv[1:0] adc conversion rate selection ? 00: adc conversion rate of 200ksps (default) ? 01: adc conversion rate of 250ksps ? 10: adc conversion rate of 333ksps ? 11: adc conversion rate of 400ksps maxim integrated 41 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
device control register (read/write) (continued) gpi data registers (read) bit field name description 6 dacref dac voltage reference selection ? 0: external reference voltage ? 1: internal reference voltage 7 thshdn thermal shutdown enable ? 0: thermal shutdown function disabled. ? 1: thermal shutdown function enabled. if the internal temperature monitor is enabled, and if the internal temperature is measured to be larger than 145c, the device is reset, thus bringing all channels to high-impedance mode and setting all registers to their default value. 10:8 tmpctl[2:0] temperature monitor selection ? tmpctl[0]: internal temperature monitor (0: disabled; 1: enabled) ? tmpctl[1]: 1st external temperature monitor (0: disabled; 1: enabled) ? tmpctl[2]: 2nd external temperature monitor (0: disabled; 1: enabled) 11 tmpper temperature conversion time control ? 0: default conversion time setting ? 1: extended conversion time setting 12 rs_cancel temperature sensor series resistor cancellation mode ? 0: temperature sensor series resistance cancellation disabled. ? 1: temperature sensor series resistance cancellation enabled. 13 lpen power mode selection ? 0: default power mode for normal operations ? 1: lower power mode. the analog ports are in high-impedance mode. the device can be brought out of the lower power mode by deasserting this bit. the device would then undergo the regular power-on sequence. 14 brst serial interface burst-mode selection ? 0: default address incrementing mode. the address is automatically incremented by 1 in burst mode. ? 1: contextual address incrementing mode. in burst mode, the address automatically points to the next adc- or dac-confgured port data register. specifcally, when reading adc data (writing dac data), the serial interface reads (writes to) only the data registers of those ports that are adc-confgured (dac-confgured). this mode applies to adc data read and dac data write, not dac data read. 15 reset soft reset control ? self-clearing soft reset register, equivalent to power-on reset. bit field name description 15:0 3:0 gpidat[15:0] gpidat[19:16] data received on gpi ports 0 to 19 ? the data received on gpi-confgured ports can be read by the host. ? for a given port i (0i19): ? gpidat[i] = 0: a logic zero level is received at gpi port i ? gpidat[i] = 1: a logic one level is received at gpi port i maxim integrated 42 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
gpo data registers (read/write) dac preset data registers (read/write) temperature monitor confguration register (read/write) internal temperature monitor high threshold register (read/write) bit field name description 15:0 3:0 gpodat[15:0] gpodat[19:16] data transmitted through gpo ports 0 to 19 ? dwdulwwhqewkhkrvwwrehwudqvplwwhgwkurxjkwkh*32frqjxuhgsruwv ? )rudjlyhqsruwll ? gpidat[i] = 0: a logic zero level is transmitted through gpo port i ? gpidat[i] = 1: a logic one level is transmitted through gpo port i bit field name description 11:0 11:0 dacprstdat1[11:0] dacprstdat2[11:0] dac preset data register 1 and 2 ? gdwdxvhgedoosruwvfrqjxuhglqduhodwhgprghdqg ? writing to these registers does not alter the contents of the dac data registers bit field name description 1:0 tmpintmoncfg[1:0] number of samples averaged for calculating the internal temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples 3:2 tmpext1moncfg[1:0] number of samples averaged for calculating the 1st external temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples 5:4 tmpext2moncfg[1:0] number of samples averaged for calculating the 2nd external temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples bit field name description 11:0 tmpinthi [11:0] internal temperature monitor high threshold ? maximum temperature value beyond which tmpint[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. maxim integrated g 43 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internal temperature monitor low threshold register (read/write) 1st external temperature monitor high threshold register (read/write) 1st external temperature monitor low threshold register (read/write) 2nd external temperature monitor high threshold register (read/write) 2nd external temperature monitor low threshold register (read/write) bit field name description 11:0 tmpintlo [11:0] internal temperature monitor low threshold ? minimum temperature value below which tmpint[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext1hi [11:0] 1st external temperature monitor high threshold ? maximum temperature value beyond which tmpext1[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext1lo [11:0] 1st external temperature monitor low threshold ? minimum temperature value below which tmpext1[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext2hi [11:0] 2nd external temperature monitor high threshold ? maximum temperature value beyond which tmpext2[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext2lo [11:0] 2nd external temperature monitor low threshold ? minimum temperature value below which tmpext2[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. maxim integrated 44 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port confguration registers (read/write) bit field name description 11:0 funcprm_0[11:0] funcprm_1[11:0] funcprm_2[11:0] funcprm_3[11:0] funcprm_4[11:0] funcprm_5[11:0] funcprm_6[11:0] funcprm_7[11:0] funcprm_8[11:0] funcprm_9[11:0] funcprm_10[11:0] funcprm_11[11:0] funcprm_12[11:0] funcprm_13[11:0] funcprm_14[11:0] funcprm_15[11:0] funcprm_16[11:0] funcprm_17[11:0] funcprm_18[11:0] funcprm_19[11:0] funcprm_i[4:0]: associated port ? hqhvwkhsruwwrxvhlqfrqmxqfwlrqlwkdsruwfrqjxuhglqprghru funcprm_i[7:5]: # of samples (for adc-related functional modes only) ? hqhvwkhqxpehurivdpsohvwrehfdswxuhgdqgdyhudjhgehiruhordglqjwkhuhvxowlqwkh ports adc data register. the coding of the number of samples is 2 kdw . the number of samples to average can be 1, 2, 4, 8, 16, 32, 64, or 128. funcprm_i[10:8]: range ? hwhuplqhvwkhlqsxwyrowdjhudqjhrisruwvfrqjxuhglqlqsxwprghvruwkhrxwsxwyrowdjh udqjhrisruwvfrqjxuhglqrxwsxwprghv ? in adc- or dac-related modes, range cannot be set to 000. voltage range codes adc voltage range (v) dac voltage range (v) 000 no range selected no range selected 001 0 to +10 0 to +10 010 -5 to +5 -5 to +5 011 -10 to 0 -10 to 0 100 0 to +2.5 -5 to +5 101 reserved reserved 110 0 to +2.5 0 to +10 111 reserved reserved funcprm_i[11]: avr (for adc-related functional modes only) ? adc voltage reference selection ? 0: adc internal voltage reference ? 1: adc external voltage reference (all modes except mode 6) or dac voltage reference determined by dacref (mode 6 only) funcprm_i[11]: inv (for gpi-controlled functional modes only) ? vvhuwhgwrlqyhuwwkhgdwduhfhlyhgewkh*3,frqjxuhgsruw ? dwduhfhlyhgiurp*3,frqjxuhgsruwlvqrwlqyhuwhg ? dwduhfhlyhgiurp*3,frqjxuhgsruwlvlqyhuwhg maxim integrated g 45 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) bit field name description 15:12 funcid_0[3:0] funcid_1[3:0] funcid_2[3:0] funcid_3[3:0] funcid_4[3:0] funcid_5[3:0] funcid_6[3:0] funcid_7[3:0] funcid_8[3:0] funcid_9[3:0] funcid_10[3:0] funcid_11[3:0] funcid_12[3:0] funcid_13[3:0] funcid_14[3:0] funcid_15[3:0] funcid_16[3:0] funcid_17[3:0] funcid_18[3:0] funcid_19[3:0] functional mode for port i (0i19) ? :khqvlwfklqjiurprqhprghwrdqrwkhulwlvuhfrpphqghgwruvwvlwfkwrwkhkljk impedance mode. the duration for which the device may need to stay in the transitional high- lpshgdqfhprghghshqgvrqwkhdssolfdwlrqdqgkdugduhfrqjxudwlrq ? 0000: mode 0 - high impedance ? 7khsruwlvfrqjxuhglqkljklpshgdqfhprgh ? 0001: mode 1 - digital input with programmable threshold, gpi (figure 8) ? 7khsruwlvfrqjxuhgdvd*3,krvhwkuhvkroglvvhwwkurxjkwkhgdwduhjlvwhu the dac data register for that port needs to be set to the value corresponding to the intended input threshold voltage. any input voltage above that programmed threshold is reported as a logic one. the input voltage must be between 0v and 5v. ? to avoid false interrupts, the ports gpiermsk register bit must be asserted. the dac data register can then be set for the desired threshold voltage. it may take up to 1ms for the threshold voltage to be effective. the ports gpimd register bit is set next. at that point, gpiermsk can be deasserted for the port to start detecting events. the data resulting from the comparison between the threshold voltage and the voltage at the port can be read from the corresponding gpidat register bit. ? 0010: mode 2 - bidirectional level translator terminal (figure 11) ? any pair of adjacent ports can form a bidirectional level translator path. only the lower lqgh[sruwriwkhsdluqhhgvwrehfrqjxuhgwrhqdeohwklvprgh 7khrwkhusruwlqgh[ + 1) must be set in high-impedance mode. ? port 19 cannot be set in mode 2. ? the activity on this port is observable through its gpi path. the gpi-related registers are frqjxuhgdvghvfulehgiruprgh maxim integrated g 46 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) bit field name description ? 0011: mode 3 - register-driven digital output with dac-controlled level, gpo (figure 9) ? the port is confgured as a gpo driven by the corresponding gpoda t register bit. the logic one level is set by the dac data register of that port. ? the ports dac data register needs to be set frst. it may require up to 1ms for the port to be ready to produce the desired logic one level. at that point, the port can be set in mode 3. the logic level at the port is then controlled by the corresponding gpodat register bit. ? 0100: mode 4 - unidirectional path output with dac-controlled level, gpo (figure 10) ? the port is confgured as a gpo forming the output of a unidirectional level translator path. the input port of that path is specifed by the functional parameter, associated port, and that port must be separately confgured in gpi mode. the ports dac data register defnes the logic one level. the data received by the gpi-confgured port is transmitted by this port confgured in mode 4. ? the data from the associated gpi-confgured port can be inverted by asserting the functional parameter inv. ? multiple ports confgured in mode 4 can refer to the same gpi-confgured port through the functional parameter, associated port . therefore, one gpi-confgured port can transmit its data to multiple ports confgured in mode 4. ? to avoid false interrupts and unexpected activity at the port confgured in mode 4, the gpi port must be confgured before this port is confgured in mode 4. ? functional parameters to be set: inv, associated port ? 0101: mode 5 - analog output for dac (figure 6) ? the ports dac data register must be set for the desired voltage at the port. it may take up to 1ms for the port to refect the data written in the dac data register . ? functional parameters to be set: range (codes 001, 010, and 011 apply to this mode). ? 0110: mode 6 - analog output for dac with adc monitoring (figure 7) ? in addition to the functionality of mode 5, the port is sampled by the adc. the result of the adc conversion is stored in the ports adc data register. the host can access that register to monitor the voltage at the port. ? when the adc input voltage range is set from 0v to 2.5v, (range = 100 or 110), the dac data register value must be limited to the range of values corresponding to 0v to 2.5v at the port. internally, the dac data register value is clipped, so that the pixi port voltage is contained within a range from 0v to 5v to prevent device damage. ? functional parameters to be set: avr, range ? 0111: mode 7 - positive analog input to single-ended adc (figure 3) ? the port is confgured as a single-ended adc input. ? functional parameters to be set: avr, range, # of samples ? 1000: mode 8 - positive analog input to differential adc (figure 4) ? the port is confgured as a differential adc positive input. ? functional parameters to be set: avr, range, # of samples, associated port maxim integrated 47 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) bit field name description ? 1001: mode 9 - negative analog input to differential adc ? the port is confgured as a differential adc negative input. ? the number of samples to average is defned by the associated positive port. the functional parameters avr and range must be identical to those used by the corresponding positive port. ? a port confgured in mode 9 can be associated to more than one port confgured in mode 8. ? functional parameters to be set: avr, range ? 1010: mode 10 - analog output for dac and negative analog input to differential adc (figure 5) ? while this port drives the voltage corresponding to its dac data register, it also operates as the negative input for the adc. ? the number of samples to average is defned by the associated positive port. the functional parameters avr and range must be identical to those used by the corresponding positive port. ? a port confgured in mode 10 can be associated to more than one port confgured in mode 8. ? when the adc input voltage range is set from 0v to 2.5v (range = 100 or 110), the dac data register value must be limited to the range of values corresponding to 0v to 2.5v at the port. internally, the dac data register value is clipped, so that the pixi port voltage is contained within a range from 0v to 5v to prevent device damage. ? functional parameters to be set: avr, range ? 1011: mode 11 - terminal to gpi-controlled analog switch ( figure 12) ? in this mode, two adjacent ports can be connected together through an analog switch controlled by a gpi-confgured port (designated by the functional parameter associated port ). this function involves three ports. the switch controlling port needs to be separately confgured in gpi mode. only the port with the lower index needs to be confgured in mode 11. the port with the higher index can be confgured in any other mode, except mode 2. if the port of higher index operates in an adc-related mode (mode 6, 7, 8, or 9), the signals applied to the port in mode 11 must comply with the input voltage range for which the port of higher index is confgured. ? port 19 cannot be confgured in mode 11, as there is no switch between ports 0 and 19. ? functional parameters to be set: inv, associated port ? 1100: mode 12 - terminal to register-controlled analog switch ? this mode is identical to mode 11, except that the switch remains closed as long as this port is confgured in mode 12. maxim integrated 48 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
*port must be configured separately to a compatible mode. table 4. port functional modes funcid[3:0] funcprm[11:0] mode description 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 high impedance 0 0 0 0 1 digital input with programmable threshold, gpi 0 0 0 1 2 bidirectional level translator terminal 0 0 1 0 3 register-driven digital output with dac- controlled level, gpo 0 0 1 1 4 unidirectional path output with dac- controlled level, gpo 0 1 0 0 inv associated port* 5 analog output for dac 0 1 0 1 range 6 analog output for dac with adc monitoring 0 1 1 0 avr range 7 positive analog input to single-ended adc 0 1 1 1 avr range # of samples 8 positive analog input to differential adc 1 0 0 0 avr range # of samples associated port* 9 negative analog input to differential adc 1 0 0 1 avr range 10 analog output for dac and negative analog input to differential adc (pseudo-differential mode) 1 0 1 0 avr range 11 terminal to gpi- controlled analog switch 1 0 1 1 inv associated port* 12 terminal to register- controlled analog switch 1 1 0 0 maxim integrated 49 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
adc data registers (read) dac data registers (read/write) bit field name description 11:0 adc dat_0[ 11:0 ] adc dat_1[ 11:0 ] adc dat_2[ 11:0 ] adc dat_3[ 11:0 ] adc dat_4[ 11:0 ] adc dat_5[ 11:0 ] adc dat_6[ 11:0 ] adc dat_7[ 11:0 ] adc dat_8[ 11:0 ] adc dat_9[ 11:0 ] adc dat_10[ 11:0 ] adc dat_11[ 11:0 ] adc dat_12[ 11:0 ] adc dat_13[ 11:0 ] adc dat_14[ 11:0 ] adc dat_15[ 11:0 ] adc dat_16[ 11:0 ] adc dat_17[ 11:0 ] adc dat_18[ 11:0 ] adc dat_19[ 11:0 ] adc data for port i (0i19) ? 12-bit data produced by the adc when converting the analog input signal on port i. ? 7khfrqyhuvlrquhvxowlvuhsuhvhqwhglqvwudljkwelqduirusruwvfrqjxuhglqvlqjoh hqghgprghprghvdqglqwrvfrpsohphqwirusruwvfrqjxuhg in differential or svhxgrgliihuhqwldoprghprgh7khgdwduhjlvwhuriwkhsruwfrqjxuhgdvdq adc negative input in differential or pseudo-differential mode contains 0x0000. bit field name description 11:0 dac dat_0[ 11:0 ] dac dat_1[ 11:0 ] dac dat_2[ 11:0 ] dac dat_3[ 11:0 ] dac dat_4[ 11:0 ] dac dat_5[ 11:0 ] dac dat_6[ 11:0 ] dac dat_7[ 11:0 ] dac dat_8[ 11:0 ] dac dat_9[ 11:0 ] dac dat_10[ 11:0 ] dac dat_11[ 11:0 ] dac dat_12[ 11:0 ] dac dat_13[ 11:0 ] dac dat_14[ 11:0 ] dac dat_15[ 11:0 ] dac dat_16[ 11:0 ] dac dat_17[ 11:0 ] dac dat_18[ 11:0 ] dac dat_19[ 11:0 ] dac data for port i (0i19) ? 12-bit dac data for port i. ? the data is represented in straight binary. maxim integrated g 50 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
figure 14. pixi port configuration flow chart is mode 1 , 3 , 4 , 5 , 6 , or 10 used ? configure dacref , dacctl wait 200 s enter dacdat [ i ] for ports in mode 1 , 3 , 4 , 5 , 6 , or 10 * are all ports in mode 3 , 4 , 5 , 6 , or 10 configured ? configure funcid [ i ] , funcprm [ i ] for ports in mode 1 wait 200 s times the number of ports in mode 1 configure funcid [ i ] , funcprm [ i ] for selected port wait 1 ms select first port in mode 3 , 4 , 5 , 6 , or 10 select next port in mode 3 , 4 , 5 , 6 , or 10 is mode 7 , 8 , or 9 used ? select first port in mode 9 configure funcid [ i ] , funcprm [ i ] for selected port wait 100 s select first port in mode 7 or 8 configure funcid [ i ] , funcprm [ i ] for selected port wait 100 s are all ports in mode 9 configured ? select next port in mode 9 are all ports in mode 7 or 8 configured ? select next port in mode 7 or 8 is mode 2 , 11 , or 12 used ? configure funcid [ i ] , funcprm [ i ] for ports in mode 2 , 11 , or 12 configure interrupt masks (... msk ) are temperature sensors used ? configure tmpper , rscancel , tmp ... moncfg configure adcctl configure tmpctl configure brst , thshdn , adcconv y y y y y y y n n n n n n n start of configuration configure gpodat [ i ] for ports in mode 3 end of configuration configure gpimd [ i ] for ports in mode 1 is dacctl = 2 or 3 ? y n enter dacprstdat 1 or dacprstdat 2 configure tmp ... hi and tmp ... lo applications information configuration flow chart maxim integrated g 51 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software (gui) to simplify use of the max11300, maxim has created a gui for users to easily configure the device for unique application needs with a simple drag and drop. the soft - ware generates register addresses and corresponding register values. figure 15 shows an example of this soft - ware with a few functional connections. figure 15. example of gui to develop configuration file maxim integrated g 52 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software output file created on m/d/yyyy hr:min name address value description gpo_data_15_to_0 0x0d 0x0000 gpo data for ports 15 to 0 gpo_data_19_to_16 0x0e 0x0000 gpo data for ports 19 to 16 device_control 0x10 0xdfcb device main control register interrupt_mask 0x11 0xffff interrupt mask register gpi_irqmode_7_to_0 0x12 0x0000 gpi port 0 to 7 mode register gpi_irqmode_15_to_8 0x13 0x0000 gpi port 8 to 15 mode register gpi_irqmode_19_to_16 0x14 0x0000 gpi port 16 to 19 mode register dac_preset_data_1 0x16 0x0005 dac preset data #1 dac_preset_data_2 0x17 0x02ee dac preset data #2 tmp_mon_cfg 0x18 0x0000 7hpshudwxuhprqlwrufrqjxudwlrq tmp_mon_int_hi_thresh 0x19 0x07ff internal temperature monitor high threshold tmp_mon_int_lo_thresh 0x1a 0x0800 internal temperature monitor low threshold tmp_mon_ext1_hi_thresh 0x1b 0x07ff 1st external temperature monitor high threshold tmp_mon_ext1_lo_thresh 0x1c 0x0800 1st external temperature monitor low threshold tmp_mon_ext2_hi_thresh 0x1d 0x07ff 2nd external temperature monitor high threshold tmp_mon_ext2_lo_thresh 0x1e 0x0800 2nd external temperature monitor low threshold port_cfg_00 0x20 0x7020 rqjxudwlrquhjlvwhuiru3257 port_cfg_01 0x21 0x1000 rqjxudwlrquhjlvwhuiru3257 port_cfg_02 0x22 0x5000 rqjxudwlrquhjlvwhuiru3257 port_cfg_03 0x23 0x8024 rqjxudwlrquhjlvwhuiru3257 port_cfg_04 0x24 0x9000 rqjxudwlrquhjlvwhuiru3257 port_cfg_05 0x25 0xc000 rqjxudwlrquhjlvwhuiru3257 port_cfg_06 0x26 0x0000 rqjxudwlrquhjlvwhuiru3257 port_cfg_07 0x27 0x2000 rqjxudwlrquhjlvwhuiru3257 port_cfg_08 0x28 0x0000 rqjxudwlrquhjlvwhuiru3257 port_cfg_09 0x29 0x1000 rqjxudwlrquhjlvwhuiru3257 port_cfg_10 0x2a 0xb00e rqjxudwlrquhjlvwhuiru3257 port_cfg_11 0x2b 0x0000 rqjxudwlrquhjlvwhuiru3257 port_cfg_12 0x2c 0xb001 rqjxudwlrquhjlvwhuiru3257 port_cfg_13 0x2d 0x0000 rqjxudwlrquhjlvwhuiru3257 port_cfg_14 0x2e 0x1000 rqjxudwlrquhjlvwhuiru3257 port_cfg_15 0x2f 0x7020 rqjxudwlrquhjlvwhuiru3257 port_cfg_16 0x30 0x5000 rqjxudwlrquhjlvwhuiru3257 port_cfg_17 0x31 0x6000 rqjxudwlrquhjlvwhuiru3257 port_cfg_18 0x32 0x3000 rqjxudwlrquhjlvwhuiru3257 port_cfg_19 0x33 0x4009 rqjxudwlrquhjlvwhuiru3257 maxim integrated g 53 max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software output file (continued) name address value description dac_data_port_00 0x60 0x0005 dac data register for port0 dac_data_port_01 0x61 0x0005 dac data register for port1 dac_data_port_02 0x62 0x0005 dac data register for port2 dac_data_port_03 0x63 0x0005 dac data register for port3 dac_data_port_04 0x64 0x0005 dac data register for port4 dac_data_port_05 0x65 0x0005 dac data register for port5 dac_data_port_06 0x66 0x0005 dac data register for port6 dac_data_port_07 0x67 0x0005 dac data register for port7 dac_data_port_08 0x68 0x0005 dac data register for port8 dac_data_port_09 0x69 0x0005 dac data register for port9 dac_data_port_10 0x6a 0x0005 dac data register for port10 dac_data_port_11 0x6b 0x0005 dac data register for port11 dac_data_port_12 0x6c 0x0005 dac data register for port12 dac_data_port_13 0x6d 0x0005 dac data register for port13 dac_data_port_14 0x6e 0x0005 dac data register for port14 dac_data_port_15 0x6f 0x0005 dac data register for port15 dac_data_port_16 0x70 0x0005 dac data register for port16 dac_data_port_17 0x71 0x0005 dac data register for port17 dac_data_port_18 0x72 0x0005 dac data register for port18 dac_data_port_19 0x73 0x0005 dac data register for port19 maxim integrated g 54 layout, grounding, bypassing for best performance, use pcbs with a solid ground plane. ensure that digital and analog signal lines are separated from each other. do not run analog and digital (especially clock) lines parallel to one another or digital lines underneath the max11300 package. noise in avdd, agnd, avddio, avssio, adc_ref_int, adc_ext_ int, and dac_ref affects the device performance. bypass avdd, dvdd, avddio, and avssio to ground with 0.1f and 10f bypass capacitors. bypass adc_ int_ref and dac_ref to ground with capacitors whose values are shown in the ref electrical specifications table. bypass adc_ext_ref to ground with a 4.7f capacitor. place the bypass capacitors as close as pos - sible to the respective pins and minimize capacitor lead and trace lengths for best supply-noise rejection. for optimum heat dissipation, connect the exposed pad (ep) to a large copper area, such as a ground plane. max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
+ denotes a lead(pb)-free/rohs-compliant package. * future productcontact factory for availability. **ep = exposed pad. part temp range pin-package max11300gcm+* -40c to +105c 48 tqfp-ep** max11300gtl+ -40c to +105c 40 tqfn-ep** package type package code outline no. land pattern no. 40 tqfn-ep t4066+3 21-0141 90-0054 48 tqfp-ep c48e+8 21-0065 90-0138 maxim integrated 55 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. chip information process: bicmos ordering information max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
revision number revision date description pages changed 0 3/14 initial release ? 2014 maxim integrated products, inc. 56 revision history maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max11300 pixi, 20-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.

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